Translation Look-aside Buffer

storage, architecture (TLB) A table used in a virtualmemory system, that lists the physical address page

number associated with each virtual address page number.

A TLB is used in conjunction with a cache whose tags are

based on virtual addresses. The virtual address is presented

simultaneously to the TLB and to the cache so that cache

access and the virtual-to-physical address translation can

proceed in parallel (the translation is done "on the side").

If the requested address is not cached then the physical

address is used to locate the data in main memory. The

alternative would be to place the translation table between

the cache and main memory so that it will only be activated

once there was a cache miss.

(1995-01-30)